MIXED-01
Planned
ADC / DAC
Converter architecture, quantization, sampling 및 digital calibration.
Coming SoonSystem Integration Archive
Mixed-Signal Libraries
ADC/DAC, Comparator, Sample & Hold, PLL, Clock/Jitter, 센서 인터페이스 및 High-Speed Interface 구조로 확장할 예정입니다.
MIXED-02
Planned
PLL / Clock
PLL 구조, phase noise, jitter, clock generation 및 distribution.
Coming Soon
MIXED-03
Planned
Sensor Interface
Analog front-end, comparator, calibration 및 digital control interface.
Coming Soon
MIXED-04
Planned
High-Speed Interface
SerDes 기초, clock/data recovery 및 mixed-signal timing 구조.
Coming Soon